WRITE A VHDL PROGRAM FOR 8 TO 1 MULTIPLEXER

Multiplexer is a digital switch.It allows digital information from several sources to be rooted on to a single output line.The basic multiplexer has several data input lines and a single output line.The selection of a particular input line is controlled by a set of selection lines.Normally there are 2^N input lines and N selection lines whose bit combinations determine which input is selected.Therefore multiplexer is many into one and it provides the digital equivalent of an analog selector switch.

 

 

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_ARITH.ALL;

use IEEE.STD_LOGIC_UNSIGNED.ALL;

 

entity Mux8_1 is

port ( SEL: in STD_LOGIC_VECTOR(2 downto 0);

 A,B,C,D,E,F,G,H :in STD_LOGIC;

MUX_OUT: out STD_LOGIC );

end Mux8_1;

 

architecture BEHAVIORAL of Mux8_1 is

begin

process (SEL,A,B,C,D,E,F,G,H)

begin

case  SEL is

when "000" => MUX_OUT <= A;

when "001" => MUX_OUT <= B;

when "010" => MUX_OUT <= C;

when "011" => MUX_OUT <= D;

when "100" => MUX_OUT <= E;

when "101" => MUX_OUT <= F;

when "110" => MUX_OUT <= G;

when "111" => MUX_OUT <= H;

when others => null;

end case;

end process;

end BEHAVIORAL;